In a DC-DC converter, the power consumption of a power device is relatively large. In the improvement of the electric performance and heat dissipation of the power device, metal electrode of the device is exposed from a plastic package material covering a semiconductor chip. For example, US patent publication US2003/0132531A1 shows a semiconductor package 24 including a semiconductor chip with exposed bottom electrode being used for supporting surface mounting technology. As shown in FIG. 1, a power chip MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) 10 is arranged in an interior space in a metal can 12. A drain electrode at one side of MOSFET 10 is arranged in the interior space and is attached on the bottom of the metal can 12 via conductive silver paste 14 so that the drain electrode is electrically connected to a protruded edge 22 of the metal can 12, while a source electrode and a gate electrode at an opposite side of the MOSFET are coplanar with the upper surface of the protruded edge 22. A low-stress and high-adhesive epoxy 16 is filled in a gap between the MOSFET 10 and the metal can 12. Although the heat dissipation issues have been solved for the package 24, it is expensive to produce such metal can 12. In addition, both the source electrode 18 and the gate electrode are fixed on the semiconductor chip 10, thus it is difficult to adjust the gate electrode to be located at the same line with the protruded edge 22 to match the layout of a bonding pad on a PCB (Printed Circuit Board). Such package is incompatible with the bonding pad of the conventional PCB. Moreover, the on-resistance (RDson) of the power device is relatively large. In the existing wafer-level packaging technology, the semiconductor wafer is thinned to reduce the RDson, but this will result in cracking the wafer.
It is within this context that embodiments of the present invention arise.